BSDCan2012 - Slide Update J
BSDCan 2012
The Technical BSD Conference
| Speakers | |
|---|---|
|
Piotr Zięcik |
| Schedule | |
|---|---|
| Day | Talks - 2 - 2012-05-12 |
| Room | MRT 205 |
| Start time | 11:30 |
| Duration | 01:00 |
| Info | |
| ID | 299 |
| Event type | Lecture |
| Track | Embedded |
| Language used for presentation | English |
FreeBSD on Freescale QorIQ Data Path Acceleration Architecture Devices
This paper describes the design and implementation of the FreeBSD operating system port for the QorIQ Data Path Acceleration Architecture, a family of communications microprocessors from Freescale.
These chips are a modern, multi-core, PowerPC based SoCs, which feature a number of specifically designed peripherals, addressed for the high performance networking devices, which are increasingly common in modern communication infrastructure.
The primary focus is the Data Path Acceleration Architecture (DPAA) with the new approach to network interface architecture. It has significant influence on the FreeBSD device drivers design and implementation. The paper describes how the full network functionality was brought forward, and also covers other major development tasks like the e500mc quad-core SMP bring-up and support for other integrated devices.