BSDCan2017 - 0722d
BSDCan 2017
The Technical BSD Conference
| Speakers | |
|---|---|
|
Nanako Momiyama |
| Schedule | |
|---|---|
| Day | Talks #2 - 10 June - 2017-06-10 |
| Room | DMS 1110 |
| Start time | 13:30 |
| Duration | 01:00 |
| Info | |
| ID | 823 |
| Event type | Lecture |
| Track | Hacking |
| Language used for presentation | English |
IP Forwarding Fastpath
User-space packet forwarding has demonstrated impressive performance. However, doing so in production has introduced a lot of fundamental and engineering problems, such as isolation, scalability to the number of VMs and API/ CLI compatibility. We therefore explore a software packet switching architecture to address these problems, basing our solution on the kernel packet forwarding plane.
At EuroBSDcon 2016 we demonstrated that applying VALE/mSwitch for packet I/O and DXR for IPv4 lookup accelerates the FreeBSD packet forwarding rate by a factor of 1.7, reaching to 2.4 Mpps on a single CPU core. In this talk we present new methods which increase this rate to 5.6 Mpps.
Despite of the superior performance, commercial interests have exposed problems with using user-space software switches and routers; examples include lack of compatibility with existing CLIs and APIs, complexity to (securely) serve VMs, scalability to the number of ports or VMs, energy consumption (e.g., due to polling on a NIC) and lack of extensive protocol support.
In this work we therefore do not take a path of user-space networking; we instead explore a kernel forwarding plane architecture that achieves similar performance to user-space networking. We start from improving packet I/O and IP lookup, because they are known to be bottlenecks. We used current FreeBSD for baseline and applied VALE/mSwitch for packet I/O and DXR for IP lookup. Default FreeBSD forwards packets at 1.4 Mpps and applying VALE/mSwitch and DXR increases this rate to 2.4 Mpps.
Since this rate is still far away from the 10 Gbps line rate at which mSwitch/VALE can forward, we carefully analyse bottlenecks in our system.
We find that L2 and L3 protocol processing is expensive at both input and output paths. We therefore implemented new methods to conditionally bypass expensive code paths: quick protocol identification for input and destination MAC address caching within DXR FIB for output. As a result, we increase the packet forwarding rate to 5.6 Mpps.